TCD1254GFG线性CCD传感器数据手册_电子/电路_工程科技_专业资料
TOSHIBA CCD Image Sensor  CCD (charge coupled device)
TCD1254GFG
The TCD1254GFG is a high sensitive and low dark current 2500-elements linear image sensor.
This device consists of sensitivity CCD chip.
The TCD1254GFG has electronic shutter function (ICG). Electronic shutter function can keep always output voltage constant that vary with intensity of lights.
Features
Number of Image Sensing Elements: 2500 elements                                    • • • • • • • Image Sensing Element Size: 5.25 μm × 64
μm
Photo Sensing Region: High sensitive and low dark current
pn photodiode
Internal Circuit: CCD Drive Circuit Weight: 0.47 g (typ.)
Power Supply: Only 3.0V Drive (MIN.)
Function: Electronics Shutter, Sample and Hold Circuit Package: 16 pin GLCC Package
Maximum Ratings (Note1)
Characteristic Symbol Rating Unit
Master clock pulse voltage V φΜShift pulse voltage V SH ICG pulse voltage V ICG Digital power supply V DD Analog Power Supply V AD −0.3~7.0
V
Operating temperature T opr −25~60 °C Storage temperature
T stg
−40~85 °C NC 16 15 OS 1
2
3
SS 10  9
8 NC 14 NC VAD 4NC NC 11 13 12 56NC φΜ VDD ICG SH 7
NC
Pin Connections (top view)
Note 1: All voltage is with respect to SS terminals (ground).
Block Diagram
Pin Names
Pin No. Symbol
Name
Pin No.Symbol
南宁电子科技广场Name
1
OS Output signal
16
NC Non Connection
2 SS Ground 15 NC Non Connection
3 VAD Power (Analog) 1
4 NC Non Connection 4 VDD Power (Digital) 13 NC Non Connection
5 φM Master clock 12 NC Non Connection
6 ICG Integration clear gate 11 NC Non Connection
7 SH
Shift gate
10 NC
Non Connection
8
NC Non connection 9
NC Non Connection
φ M
SS
SH
ICG
Optical/Electrical Characteristics
(Ta = 25°C, V φ = 4.0V (pulse), f φΜ = 2.0 MHz (Data rate=1MHz), Tint(Integration time) =10ms,
Load resistance
= 100 k Ω,  VAD = VDD = 4.0V, Light source = Daylight fluorescent lamp) Characteristics Symbol Min Typ.Max
Unit Note
Sensitivity R 72 103⎯ V/lx ・s (Note2) Photo response non uniformity PRNU  ⎯
⎯ 10 %
(Note3) Register imbalance RI ⎯ 1.5 3
%
(Note4)
Saturation output voltage V SAT 0.7 1.0 ⎯ V (Note5) Saturation exposure SE ⎯ 0.01
⎯ lx ・s (Note6)
Dark signal voltage V MDK ⎯ 2.5 15 mV (Note7)
DC power dissipation
PD ⎯ 24 60 mW
Total transfer efficiency
TTE 92
95
⎯ % (Note 8)
92 95 ⎯ % (Note 9) Low voltage total transfer efficiency
LVTTE 83 88 ⎯
% (Note 10)
Output impedance Z O - 0.5 1.0 κΩ
DC output voltage V OS    1.5 2.3 3.0 V
(Note 11)
Dynamic range
DR
⎯ 400
⎯ (Note 12)
Note 2: Sensitivity is defined for signal outputs when the photosensitive surface is applied with the light of uniform
illumination and uniform color temperature. Note 3: PRNU is defined for a single chip by the expressions below when the photosensitive surface is applied with
the light of uniform illumination and uniform color temperature.
ΔX
PRNU = × 100(%)
Where X  is average of total signal output and ΔX is the maximum deviation from X . The amount of incident light is 1/2・SE.
Note 4: Register imbalance is defined as follows.
×100(%)
RI =          Where X  is average of total signal output.
ΔY :  | average of odd signal output – average of even signal output |
Note 5: V SAT  is defined as minimum saturation output of all effective pixels. Note 6: Definition of SE
V SAT  SE =
R
(lx ・s)
Note 7: V MDK  is defined as maximum dark signal voltage of all effective pixels.
MDK
OS
Note 8: Total transfer efficiency is defined as follow.
* Q0=500mV
Use Q0’ and Q1’ instead of Q0 and Q1                                                                if Q1’ > Q1.
Note 9: Definition of Low voltage total transfer efficiency is same as Note 8 without power supply and Q0.
* 4V ≦ Power supply ≦5 V            * Q0 = 50mV
Note 10: Definition is same as Note 9 without power supply as follows.
* 3V ≦ Power supply <4 V
Note 11: DC signal output voltage is defined as follows.
OS
Note 12: Definition of DR
V SAT
DR =
V MDK
V MDK  is proportional to Tint (Integration time), so, the shorter Tint condition makes wider DR.
Operating Condition
Characteristics Symbol Min Typ. Max Unit
“H” Level    3.0
4.0
5.0
Master clock pulse voltage
“L” Level
V φΜ
0 0 0.44 V (Note 13)
“H” Level    3.0
4.0
5.0
Shift pulse voltage
“L” Level V SH
0 0 0.44 V (Note 13)“H” Level    3.0
4.0
5.0
ICG pulse voltage
“L” Level
V ICG 0 0 0.44
V (Note 13)Power supply voltage (Digital) V DD    3.0 4.0 5.0 V (Note 14)Power supply voltage (Analog)
V AD
3.0
4.0
5.0 V (Note 14)
Note 13 “H” level of maximum pulse voltage = VDD ≥ VDD-0.5V = “H” level of minimum pulse voltage.
Note 14 V AD  = V DD
Clock Characteristics (Ta = 25°C) (3.0V ≦V AD  = V DD ≦5.0V)
Characteristics Symbol Min Typ. Max Unit
Master clock frequency f φΜ0.4 2    4 MHz Data Rate
f DATA 0.2 1    2 MHz Master clock capacitance C φΜ⎯ 10 ⎯ pF Shift pulse capacitance C SH ⎯ 200 ⎯ pF ICG Pulse capacitance
C ICG
⎯ 50 ⎯ pF
Optical/Electrical characteristics of page 3 are defined under the condition of 1MHz data rate.
Power- On characteristics
CCD sensor has the characteristics that a correct output signal will be appeared after power supply reached to regular voltage. It is required to 10 cycles of read out time at least after power supply reached to regular voltage. This characteristics should be considered, when circuit designs.

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